1. Technical Field
The present disclosure relates to a capacitive coupling, asynchronous electronic level shifter circuit.
2. Description of the Related Art
As is known, today it is possible for an integrated circuit, formed on a respective die, to present two or more voltage domains. In other words, it is possible, for two or more regions, also known as “wells”, to be formed inside the die, which share one and the same substrate of semiconductor material, and formed inside which are respective electronic circuitries. Moreover, each region can be electrically connected to a respective supply voltage and to a respective ground, the supply voltages and/or the grounds of different regions differing from one another.
In practice, assuming for simplicity the presence, within the integrated circuit, of a first region and a second region, which house, respectively, a first electronic circuitry and a second electronic circuitry, it happens that these first and second electronic circuitries are electrically coupled in such a way to be able to transmit to one another signals of a digital or analog type.
In greater detail, assuming for simplicity that the first and second regions share one and the same ground and that they are, respectively, connected to a first supply voltage VDDA and a second supply voltage VDDB, different from one another, the first and second supply voltages VDDA, VDDB define, respectively, a first voltage domain and a second voltage domain, which in turn affect the dynamics of the signals generated within the first and second circuitries.
Assuming that the first electronic circuitry transmits a communication signal to the second electronic circuitry, it may happen that the dynamics of the communication signal, i.e., the difference between the maximum value and the minimum value of the voltage of the communication signal, does not enable a correct reception thereof by the second electronic circuitry. For example, with reference to a communication signal of a digital type, it is possible for a transition from a voltage level associated to a bit “0” to a voltage level associated to a bit “1” not to be sufficient to enable correct interpretation of the bit “1” by the second electronic circuitry, i.e., not to be sufficient to cause a switching of the latter.
In order to adapt the dynamics of the signals, it is known to resort to so-called “level shifters”.
It is hence known to provide a level shifter between two regions connected to different voltage domains. In addition, level shifters are used not only for communications between different regions of one and the same integrated circuit, but also, for example, within the so-called “input/output (I/O) stages”, which are formed by input/output electronic circuits connected to conductive pads, which are to receive electrical signals coming from the outside world. Each input/output electronic circuit implements a corresponding level shifter in such a way as to enable adaptation of the signals coming from the outside world, such as, for example, electrical signals coming from a board, as a function of the voltage domain of the region that houses the input/output electronic circuit and the corresponding conductive pad. In this way, the integrated circuit can communicate with the outside world in a unidirectional or bidirectional way.
If we refer to the case of the level shifter between two different regions of one and the same integrated circuit as the so-called “two-dimensional or 2D case”, it is moreover known to resort to level shifters to enable communication between two different integrated circuits of an electronic device, the latter case being also known as “three-dimensional or 3D case”. In particular, the two different integrated circuits are formed within corresponding pads, which form the electronic device.
Purely by way of example, U.S. Pat. Nos. 7,245,152, 7,835,200, and 7,446,566 describe level shifters formed by using transistors, and in particular by using transistors of a metal-oxide-semiconductor (MOS) type.
In order to reduce consumption and obtain better properties of noise filtering, capacitive coupling level shifters are also known. For example, US Patent Publication Number 2008/0088353 describes a level shifter including a switched-capacitor circuit. This level shifter is hence of a synchronous type, since switching of the switched-capacitor circuit is driven by a signal different from the signal to be shifted. The level shifter described in US Patent Publication Number 2008/0088353 is hence characterized by a certain circuit complexity.
In addition, U.S. Pat. No. 7,777,549 describes a level shifter including a pair of capacitors and an inverter circuit, which are connected so as to perform a conversion of an input signal into a differential signal. This level shifter is hence characterized by good properties of filtering of the input signal. However, on account of the level shift, it is possible for the inverter circuit not to have a sufficient sensitivity for detecting transitions of the input signal from a first logic value to a second logic value.